GS3440-INe3

The GS3440 is a high-speed BiCMOS integrated circuit designed to equalize and restore signals received over 75ohm coaxial cable.

The device is designed to support SMPTe ST 424, SMPTe ST 292 and SMPTe ST 259, and is optimized for performance at 270Mb/s, 1.485Gb/s and 2.97Gb/s.

The GS3440 features DC restoration to compensate for the DC content of SMPTe pathological test patterns.

 The Carrier Detect output pin (CD) indicates whether a valid input signal has been detected. It can be connected directly to the SLeeP pin to enable automatic power-down upon loss of carrier. In the manual sleep mode, a voltage programmable threshold, which can be changed via the SQ_ADJ pin, forces CD high when the input signal amplitude falls below the threshold. This allows the GS3440 to distinguish between low-amplitude SDI signals and noise at the input of the device.

The equalizing and DC restore stages are disengaged when the BYPASS pin is HIGH. No equalization occurs in Bypass mode.

The GS3440 includes a gain selection pin (GAIN_SeL) which, when tied HIGH, compensates for 6dB flat attenuation.

The differential outputs can be DC-coupled to all Gennum cable drivers and reclockers and to industry-standard 1.2V, 2.5V and 3.3V CML logic using the VCC_O pin. In general, DC-coupling to any termination voltage between 1.2V and 3.3V is supported.

The GS3440 also includes programmable de-emphasis with three operating levels in order to support long PCB traces. The device is available in a 16-pin, 4mm x 4mm QFN package.

The GS3440 is Pb-free, and the encapsulation compound does not contain halogenated flame retardant.

This component and all homogeneous subcomponents are RoHS compliant.